Interrupt Descriptors Table by FedorLap2006 · Pull Request #26 · osdev0/wiki

FedorLap2006 · 2022-05-31T14:47:29Z

This PR adds the basic explanation and specs of IDT.
It's my first PR, edits from maintainers are welcome.

pages/idt.adoc

lukflug · 2022-05-31T18:59:56Z

Compare with #15

lukflug

There are a couple of grammatical issues with this (which isn't surprising, since it was ripped off the osdev.org wiki, which is why I don't recommend taking stuff from there to build this wiki, even though it is public domain).
In any case, this cites zero sources.

pages/idt.adoc

lukflug · 2022-05-31T19:35:52Z

pages/idt.adoc

+If CPU was running in 32-bit mode, and the selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point. To return back to 32-bit mode `o32 iret` instruction should be used, otherwise CPU would not know how to perform a 32-bit return (reading 32-bit instead of 16-bit values from the stack).
+
+==== Trap Gate
+Trap gate is similar to Interrupt Gate. It is commonly used for syscalls and exceptions. The difference is that for a Trap Gate CPU does not disable hardware interrupts, while upon entering Interrupt Gate CPU automatically disables hardware interrupts and reenables them on return.


"The difference is that, for a trap gate, the CPU does not change the interrupt flag, while, upon entering an interrupt gate, the CPU automatically clears the interrupt flag. The CPU automatically restores the previous state of the interrupt flag upon returning from an interrupt for both interrupt gates and task gates."
The claim that it is commonly used for syscalls and exceptions needs more verification.
It might also be a good idea to further specify the concept of "enabling/disabling hardware interrupts", by replacing it by "setting/clearing the interrupt flag".
In addition, the CPU does not set the interrupt flag when returning from an interrupt gate, it restores the previous state of the interrupt flag from the stack for a interrupt gate and task gate.

lukflug · 2022-05-31T19:37:06Z

pages/idt.adoc

+In a Task Gate the *Selector* value should refer to a position in the GDT which specifies a Task 
+State Segment rather than a code segment, and the *Offset* value is unused and should be set to zero.


"selector" and "offset" are probably lower case.
Also, don't make them bold.
Use bold to highlight important terms as they are introduced.
To emphasize something, use italics.

lukflug · 2022-05-31T19:37:29Z

pages/idt.adoc

+In a Task Gate the *Selector* value should refer to a position in the GDT which specifies a Task 
+State Segment rather than a code segment, and the *Offset* value is unused and should be set to zero.
+
+When processing this interrupt, the CPU it will perform a hardware task switch to the specified task, rather than jumping to an ISR. A pointer back to the task which was interrupted will be stored in the Task Link field in TSS.


"task link field" is probably lower case

Link in this case means a field in the TSS. I decided to specifically capitalize it.

pitust · 2022-06-01T18:13:12Z

pages/idt.adoc

+|===
+
+
+// TODO: x86_64


Add x86_64 stuff here

pitust

There is no mention of lidt here

lukflug

Why does every sentence in the gate type section start a new paragraph.
This article still cites no sources.
The short description is also wrong.

lukflug · 2022-06-04T19:14:41Z

pages/idt.adoc

+
+// TODO: articles "GDT" and "Interrupts" are not written yet
+
+Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.


Add "the" or "an".

lukflug · 2022-06-04T19:15:17Z

pages/idt.adoc

+// TODO: articles "GDT" and "Interrupts" are not written yet
+
+Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.
+It is used by the CPU to lookup an interrupt service routines (ISR) when an xref:interrupts[interrupt] is issued.


"interrupt service routine" singular

lukflug · 2022-06-04T19:15:58Z

pages/idt.adoc

+
+Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.
+It is used by the CPU to lookup an interrupt service routines (ISR) when an xref:interrupts[interrupt] is issued.
+It is protected mode and long mode counterpart to real mode interrupt vector table (IVT).


"the protected mode and long mode counterpart"

lukflug · 2022-06-04T19:16:29Z

pages/idt.adoc

+It is used by the CPU to lookup an interrupt service routines (ISR) when an xref:interrupts[interrupt] is issued.
+It is protected mode and long mode counterpart to real mode interrupt vector table (IVT).
+
+IMPORTANT: IDT requires a working xref:gdt[GDT]


add "an" or "the"

lukflug · 2022-06-04T19:17:14Z

pages/idt.adoc

+|===
+
+==== Things to know
+* IDT can contain up to 256 (0..255) ISR vectors. Entries above this limit will be ignored.


"the" or "an"

lukflug · 2022-06-04T19:42:27Z

pages/idt.adoc

+
+IMPORTANT: Usage of 16-bit gates is highly unadvised, as the CPU cannot properly return to 32-bit mode using `iret`.
+
+If the CPU was running in 32-bit mode, and the specified selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point.


"protected mode is lower case"
also, this does not take compatibility mode into account

lukflug · 2022-06-04T19:43:13Z

pages/idt.adoc

@@ -0,0 +1,142 @@
+---
+title: Interrupt descriptor table


inconsistent capitalization

lukflug · 2022-06-04T19:44:54Z

pages/idt.adoc

+|===
+
+==== Interrupt Gate
+An interrupt gate is used to indicate an interrupt service routine (ISR).


maybe there is a better verb than "indicate"

lukflug · 2022-06-04T19:45:26Z

pages/idt.adoc

+| 32-bit trap gate
+|===
+
+==== Interrupt Gate


section headers are sentence case

lukflug · 2022-06-04T19:45:35Z

pages/idt.adoc

+
+If the CPU was running in 32-bit mode, and the specified selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point.
+
+==== Trap Gate


see previous comment

feat: idt

0b8d42a

pitust suggested changes May 31, 2022

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lukflug suggested changes May 31, 2022

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FedorLap2006 added 3 commits June 1, 2022 00:04

feat(idt): review changes and refactoring

bf8818b

feat(idt): grammar and stylistic changes

2dbcf3a

fix(idt): tags and description

e494d28

FedorLap2006 requested review from lukflug and pitust June 1, 2022 11:23

pitust reviewed Jun 1, 2022

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pages/idt.adoc

|===

// TODO: x86_64

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Add x86_64 stuff here

pitust reviewed Jun 1, 2022

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lukflug suggested changes Jun 4, 2022

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		In a Task Gate the Selector value should refer to a position in the GDT which specifies a Task
		State Segment rather than a code segment, and the Offset value is unused and should be set to zero.


		// TODO: articles "GDT" and "Interrupts" are not written yet

		Interrupt Descriptor Table is a binary data structure specific to IA-32 (xref:x86[x86]) and x86_64 architectures.


		IMPORTANT: Usage of 16-bit gates is highly unadvised, as the CPU cannot properly return to 32-bit mode using `iret`.

		If the CPU was running in 32-bit mode, and the specified selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point.


		If the CPU was running in 32-bit mode, and the specified selector is a 16-bit gate, it will switch to 16-bit Protected Mode and jump to the entry point.

		==== Trap Gate

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